Transfer switches are mainly used for communication networks. There are several types of communication networks such as the ethernet, the token ring and the FDDI. Some networks use the asynchronous transfer mode telecommunications concept. This concept is particularly advantageous in the emerging field of high speed virtual networking.
The asynchronous transfer mode (ATM) has been chosen by standards committees as an underlying transport technology within many broadband integrated services digital network protocol stacks. In this context, "transport" refers to the use of ATM switching and multiplexing techniques at the data link layer to convey end--user traffic from source to destination within a network. A description of the standardised ATM telecommunications concept can be found in a publication of the ATM forum entitled "ATM user--network interface specification", 1993, published by PTR Prentice Hall.
FIG. 1 shows an example of an asynchronous transfer mode network. The ATM network itself is schematically depicted within the network region 1. The network region 1 contains the ATM switches 2, 3 and 4. The network region 1 might contain a high number of further transfer switches which are not depicted in the drawing. The transfer switches 2, 3 and 4 are interconnected via communication links 5, 6 and 7. Each of the communication links 5, 6 and 7 contains one or more transfer switches. Thereby a network is established.
By way of example it is shown in FIG. 1 that the private networks 11, 12 and 13 are connected via the communication links 8, 9 and 10 to the ATM network in the network region 1. Information is interchanged on such a network by means of so called cells. FIG. 2 shows the structure of such a cell according to the ATM standard. The cell carries a payload 14 which contains a piece of information to be transmitted via a virtual connection of the network. Furthermore the cell contains a cell header 15 which carries control information. According to the ATM standard the GFC field of the cell carries general flow control data, the VCI field contains a virtual connection identifier, the VPI field contains a virtual path identifier and the field PT identifies the payload type.
Further control fields are the CLP field which optionally indicates the explicit loss priority of the cell and the HEC field which is used for error correction purposes.
FIG. 3 shows a schematic diagram of a transfer switch of a type which could be used for the standardised ATM network. Transfer switches of the type as shown in FIG. 3 are well known in the prior art and are widely used for switching in networks. Transfer switches are used for transferring data cells which belong to virtual connections over physical links.
The transfer switch comprises a switch 16, a transfer layer 17 and communication channels 18. The switches themselves of switch 16 are not depicted in the drawing, but only the FIFOs S.sub.0 to S.sub.N-1. The N FIFOs S.sub.0, S.sub.1, S.sub.2, . . . , S.sub.N-1 of the switch 16 are storage means for storage of a number N of switch queues. The switch queues serve to buffer the outputs of the switch 16
The FIFO S.sub.0 contains the storage locations, C.sub.01, C.sub.02, . . . C.sub.06. Each of these storage locations has the capacity to hold a complete ATM cell (cf. FIG. 2). The same applies for the other FIFOs S.sub.1, S.sub.2, . . . S.sub.N-1 of the switch 16, especially for the storage cells C.sub.N-1,0 and C.sub.N-1,6. Each of the FIFOs S.sub.0 to S.sub.N-1 has the capacity to buffer 6 ATM cells. Hence a number N of switch queues each having a length of up to 6 cells can be stored in the FIFOs of the switch 16.
The output of each of the FIFOs S.sub.0 to S.sub.N-1 is connected via the cell bus 19 to the transfer layer 17. The transfer layer 17, comprises a FIFO 20 for storage of a cell queue having a length of up to L=6 ATM cells. The FIFO 20 receives ATM cells via the bus 19 from the switch queues which are realised in the FIFOs S of the switch 16 to perform ATM layer functions on these cells and feed them into the communication channels 18 according to the originating switch queue.
The FIFO 20 of the transfer layer 17 comprises the L=6 storage locations 21, 22, 23, 24, 25 and 26. Each of the storage locations 21-26 has the capacity to hold a complete ATM cell.
The output of the FIFO 20 is connected via the cell bus 27 to the communication channels 18. The cell bus can be of the type of an UTOPIA cell bus, as defined in "UTOPIA, an ATM-PHY interface specification", level 2, version 0.8, Apr. 10, 1995, published by the ATM forum. The transfer layer 17 can be realised by means of a micro processor, such as Motorola MC 92500.
The communication channels 18 comprise a number of N of physical lines L.sub.0 to L.sub.N-1. The lines L.sub.0 to L.sub.N-1 serve to establish so called physical layer (PHY) connections. Examples for such physical connections are the communication links 5, 6, 7 and 8, 9, 10 as shown in FIG. 1.
Each of the physical lines L.sub.0 to L.sub.N-1 is connected to an output buffer. In the example shown in FIG. 3 the output buffers B.sub.0, B.sub.1, . . . B.sub.N-1 are FIFOs. Each of the FIFOs B.sub.0 to B.sub.N-1 has 10 storage locations each of which having a storage capacity sufficient to hold a complete ATM cell. The output buffer B.sub.0 has the storage locations D.sub.01, D.sub.02, . . . D.sub.0,10 whereas the FIFO B.sub.N-1 has the storage locations D.sub.N-1,0, D.sub.N-1, . . . , D.sub.N-1,10. Hence, the storage means of the communication channels 18, which in this case are realised by means of FIFOs--can each hold an output cell queue having a length of up to P=10 cells. The cells are inputted to the FIFOs of the communication channels 18 via the cell bus 27 from the transfer layer 17.
Typically, in an ATM switching system there is a one to one relationship between the FIFOs S.sub.0 to S.sub.N-1 of the switch 16 and the FIFOs B.sub.0 to B.sub.N-1 of the communication channels 18: a cell which originates from FIFO S.sub.x, where 0.gtoreq.x &gt;N, is transferred via the bus 19, the FIFO 20 and the bus 27 to its corresponding FIFO B.sub.x. In other words each of the physical lines L.sub.0 to L.sub.N-1 is unambiguously assigned to one of the FIFOs S.sub.0 to S.sub.N-1 of the switch 16 and vice versa.
The numbers indicated in the storage locations 21-26 of the FIFO 20 symbolise the origin of the cell which is at present stored in a specific storage location of the FIFO 20. For example the cell stored on storage location 21 originates from the FIFO S.sub.0, the cell stored on storage location 22 originates from the FIFO S.sub.5 (which is not shown in the drawing) and the cell stored on storage location 26 also originates from the FIFO S.sub.0. Hence, FIG. 3 depicts a snap shoot of the operation of the transfer switch.
The invention seeks to provide an improved transfer layer and an improved transfer switch, such as an ATM switch, which allow a higher data transmission rate. Furthermore the invention seeks to provide an improved method for operating of a transfer switch.